GPIO

GPIOD 0x50000C00

11 rejestrów/klastrów w tym peryferium.

Rejestr: MODER 0x50000C00

rw

GPIO port mode register

Bit	Szer.	Pole	Dostęp	Opis
0–1	2	MODER0	—	Port x configuration pin 0
2–3	2	MODER1	—	Port x configuration pin 1
4–5	2	MODER2	—	Port x configuration pin 2
6–7	2	MODER3	—	Port x configuration pin 3
8–9	2	MODER4	—	Port x configuration pin 4
10–11	2	MODER5	—	Port x configuration pin 5
12–13	2	MODER6	—	Port x configuration pin 6
14–15	2	MODER7	—	Port x configuration pin 7
16–17	2	MODER8	—	Port x configuration pin 8
18–19	2	MODER9	—	Port x configuration pin 9
20–21	2	MODER10	—	Port x configuration pin 10
22–23	2	MODER11	—	Port x configuration pin 11
24–25	2	MODER12	—	Port x configuration pin 12
26–27	2	MODER13	—	Port x configuration pin 13
28–29	2	MODER14	—	Port x configuration pin 14
30–31	2	MODER15	—	Port x configuration pin 15

Rejestr: OTYPER 0x50000C04

GPIO port output type register

Brak zdefiniowanych pól bitowych.

Rejestr: OSPEEDR 0x50000C08

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GPIO port output speed register

Bit	Szer.	Pole	Dostęp	Opis
0–1	2	OSPEEDR0	—	Port x configuration pin 0
2–3	2	OSPEEDR1	—	Port x configuration pin 1
4–5	2	OSPEEDR2	—	Port x configuration pin 2
6–7	2	OSPEEDR3	—	Port x configuration pin 3
8–9	2	OSPEEDR4	—	Port x configuration pin 4
10–11	2	OSPEEDR5	—	Port x configuration pin 5
12–13	2	OSPEEDR6	—	Port x configuration pin 6
14–15	2	OSPEEDR7	—	Port x configuration pin 7
16–17	2	OSPEEDR8	—	Port x configuration pin 8
18–19	2	OSPEEDR9	—	Port x configuration pin 9
20–21	2	OSPEEDR10	—	Port x configuration pin 10
22–23	2	OSPEEDR11	—	Port x configuration pin 11
24–25	2	OSPEEDR12	—	Port x configuration pin 12
26–27	2	OSPEEDR13	—	Port x configuration pin 13
28–29	2	OSPEEDR14	—	Port x configuration pin 14
30–31	2	OSPEEDR15	—	Port x configuration pin 15

Rejestr: PUPDR 0x50000C0C

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GPIO port pull-up/pull-down register

Bit	Szer.	Pole	Dostęp	Opis
0–1	2	PUPDR0	—	Port x configuration pin 0
2–3	2	PUPDR1	—	Port x configuration pin 1
4–5	2	PUPDR2	—	Port x configuration pin 2
6–7	2	PUPDR3	—	Port x configuration pin 3
8–9	2	PUPDR4	—	Port x configuration pin 4
10–11	2	PUPDR5	—	Port x configuration pin 5
12–13	2	PUPDR6	—	Port x configuration pin 6
14–15	2	PUPDR7	—	Port x configuration pin 7
16–17	2	PUPDR8	—	Port x configuration pin 8
18–19	2	PUPDR9	—	Port x configuration pin 9
20–21	2	PUPDR10	—	Port x configuration pin 10
22–23	2	PUPDR11	—	Port x configuration pin 11
24–25	2	PUPDR12	—	Port x configuration pin 12
26–27	2	PUPDR13	—	Port x configuration pin 13
28–29	2	PUPDR14	—	Port x configuration pin 14
30–31	2	PUPDR15	—	Port x configuration pin 15

Rejestr: IDR 0x50000C10

GPIO port input data register

Brak zdefiniowanych pól bitowych.

Rejestr: ODR 0x50000C14

GPIO port output data register

Brak zdefiniowanych pól bitowych.

Rejestr: BSRR 0x50000C18

GPIO port bit set/reset register

Brak zdefiniowanych pól bitowych.

Rejestr: LCKR 0x50000C1C

GPIO port configuration lock register

Brak zdefiniowanych pól bitowych.

Rejestr: AFRL 0x50000C20

GPIO alternate function low register

Brak zdefiniowanych pól bitowych.

Rejestr: AFRH 0x50000C24

GPIO alternate function high register

Brak zdefiniowanych pól bitowych.

Rejestr: BRR 0x50000C28

port bit reset register

Brak zdefiniowanych pól bitowych.